There is a significant interest in the semiconductor industry in replacing traditional inorganic dielectric materials with polymeric materials as device deep dielectric isolation (often termed trenches in the art), etc. Polymeric materials are less expensive, can be more easily purified and fabricated, and potentially have better thermal and electrical characteristics than some inorganic counterparts.
In the monolithic integrated circuit technology, it is usually necessary to isolate various active and passive elements from one another in the integrated circuit structure. These devices have been isolated by back biasing, PN junctions, partial dielectric isolation and complete dielectric isolation. The dielectric materials used have been silicon dioxide, glass, polymers and the like.
The preferred isolation for such active devices and circuits is some form of dielectric isolation because it permits the circuit elements and the like to be adjacent the isolation and thereby result in greater density of packing of the active and passive devices on the integrated circuit chip.
It is also known that recessed dielectric isolation can be produced by first selectively removing silicon from a substrate so as to form trenches in the substrate and then filling the trenches with a dielectric material.
In the interest of minimizing the silicon chip area occupied by the dielectrically filled trenches, sputter etching processes and reactive ion etching processes have been utilized to form the trenches in the silicon substrate.
The following U.S. patents disclose various electronic devices involving the use of such dielectric isolation. These references are hereby incorporated by reference since the dielectric isolation of the present invention can be used in forming devices as taught in these references. U.S. Pat Nos. 3,766,438 Castrucci et al.; 3,961,355 Abbas et al.; 3,104,086 Bondur et al.; 4,138,442 Bondur et al.; 4,160,991 Anantha et al.; and 4,333,794 Beyer et al.
U.S. Pat. No. 4,030,948 Berger discloses the use of polyimide containing silicones which are deposited in a moat or groove 114 employed to control leakage across the end portions of PN junction 102. This patent is also hereby incorporated by reference since the dielectric material of the present invention can be substituted for the polyimide containing silicones of Berger.
The above-mentioned U.S. Pat. No. 4,333,794 Beyer et al. disclosed in FIG. 14 a polyimide isolation as represented by numeral 66 formed by applying a conventional polyimide material such as Monsanto Skybond and then etching back in O.sub.2 plasma at room temperature. Mechanical stresses near the side wall are stated to be reduced, the polyimides are stated to have excellent planarization capability and to boost device performance since they have a lower dielectric constant than SiO.sub.2.
U.S. Pat. No. 4,353,778 Fineman et al. discloses a method of etching openings in a polyimide film which can be used in an electronic device. The polyimide material is applied as polyamic acid and then partially cured and, following processing steps, the polyimide is again cured to crosslink the same so that it will resist attack by a strong base.
U.S. Pat. No. 4,347,306 Takeda et al. discloses a method for manufacturing electronic devices having a multilayer wiring structure using a polyimide dielectric material between the layers. The polyimide dielectric material is a thermosetting addition polymerization type polyimide which possesses imide rings in recurring units and a degree of polymerization which increases when cured due to the radical reaction of the present invention differ in structure, have superior properties and are cured by a different method from that disclosed in Takeda et al.
The following U.S. patents disclose polyimides, polyimide-polyamides or like materials used as insulating or passivating materials in electronic components. However, none of the materials disclosed are equivalent to those of the present invention: U.S. Pat. Nos. 3,700,497 Epifano et al.; 3,846,166 Saiki et al.; 3,486,934 Bond; 3,515,585 Chamberlin et al.; 3,985,597 Zielinski; and 4,367,119 Logan et al.
U.S. Pat. No. 4,438,273 of Landis discloses a class of polymerizable oligomers containing at least one isoimide group and terminal groups capable of undergoing an addition polymerization reaction. This patent is hereby incorporated by reference, since the polymerizable oligomers it describes are of the type which can be utilized in the present invention.